1. Field of Invention
The present invention relates to a process of forming bonding columns. More particularly, the present invention relates to a process of forming bonding columns serving as bumps on a wafer using a high-velocity physical metal deposition technique.
2. Description of Related Art
Flip chip bonding technology is one of the principle techniques for forming a chip package. To form a flip chip package, bumps are formed on die pads arranged as an array on the active surface of a chip. Next, the chip is flipped over so that the bumps are electrically and physically connected to corresponding bonding pads on a carrier (for example, a substrate or a printed circuit board (PCB)). Note that flip chip technique is able to produce a package having a higher pin count and occupying a smaller area. Moreover, average length of signal transmission paths is reduced considerably.
Before joining up a flip chip with a carrier such as a substrate or a PCB, bumps are first formed over the die pads on the active surface of the chip. A conventional process of attaching bumps to the die pads includes forming a stencil or a photo-film having a plurality of openings over the active surface of the chip (or wafer) to serve as a mask. The openings expose various die pads. Thereafter, a plating or printing step is carried out to fill the space bounded by the sidewalls of the openings and the active surface of the chip with solder material. Hence, a solder layer is formed over each die pad. The stencil or the photo-film is next removed to expose the solder layers over thedie pads. Finally, a reflow process is conducted to form a bump having a spherical profile over each die pad.
FIGS. 1A to 1F are schematic cross-sectional views showing the progression of steps for producing a conventional bump over a wafer. First, as shown in FIG. 1A, a wafer 100 having an active surface 102, a plurality of die pads 104 and a passivation layer 106 thereon is provided. The die pads 104 are formed on the active surface 102 of the wafer 100. The passivation layer 106 covers the active surface 102 of the wafer 100 but exposes the die pads 104. The wafer 100 further includes an under-bump-metallurgy (UBM) layer 108 over the die pads 104. The under-bump-metallurgy layer 108 mainly serves as an interfacial layer that increases the bonding strength between subsequently formed bumps 116a (as shown in FIG. 1F) and the die pads 104. In addition, the wafer 100 may include a stress buffer layer 110 over the passivation layer 106. The stress buffer layer 110 indirectly exposes the die pads 104 through the under-ball-metallurgy layers 108. The layer 110 mainly serves as buffer when the bumps 116a are subjected to thermal stress.
As shown in FIG. 1B, a photo-film 112 is formed over the active surface 102 of the wafer 100. The photo-film 112 is photo-exposed and then chemically developed to form a photo-film 112 with a plurality of openings 114 as shown in FIG. 1C. Here, a stencil (not shown) with openings thereon may be used instead of the photo-film 112. As shown in FIG. 1D, solder material is deposited into the space bounded by the sidewalls of the openings 114 and the active surface 102 of the wafer 100 to form solder layers 116 over various die pads 104 (or under-bump-metallurgy layers 108) in an electroplating or a printing process. As shown in FIG. 1E, the photo-film 112 (or the stencil) is removed to expose the solder layers 116 over various die pads 104. Finally, as shown in FIG. 1F, a reflow process is conducted to form spherical bumps 116a over the die pads 104 (or the under-ball-metallurgy layers 108).
However, the aforementioned steps of fabricating bumps over the die pads at least includes the following setbacks:                1. Because the bump is made from a solder material (such as a lead solder or lead-free solder), an under-ball-metallurgy layer is often formed over the die pads in order to increase the bonding strength between the bump and the die pads. Hence, this extends not only the processing cycle extended, but also increases overall production cost.        2. Due to the formation of the under-ball-metallurgy layer over the die pads, inter-metallic compound (IMC) is often formed at the interface between the die pads and the bumps leading to a lowering of the bonding strength of the bumps to the die pads.        3. If a stencil is used to provide openings over the die pads and a printing step is used to place solder material over the die pads, accuracy of positioning is usually low due to the density of openings in the stencil. Hence, stencil-printing method is unsuitable for forming fine-pitch bumps over a chip (or a wafer).        4. If a photo-film combined with an electroplating (or printing) process is used to fabricate bumps over die pads, only bumps greater than 100 μm in diameter and an array of bumps having a bump pitch greater than 250 μm can be produced. This results from an intrinsic resolution of the openings and minimum separation between neighboring openings in all photo-processing operations.        5. When a printing process is used to deposit solder material over the die pads, voids are often created in the solder layer close to the surface of the die pads. Thus, reliability of the joint between the bump and the die pad after a reflow process will be compromised. Sometimes, the bottom section of a bump may be out of contact with its corresponding die pad resulting in an open circuit condition.        